FIG. 5 is a cross-sectional view of a prior art HBT (Hetero-Bipolar Transistor) utilizing a self alignment structure and a dummy emitter.
In FIG. 5, reference numeral 26 designates a sub-collector layer comprising n.sup.+ type GaAs. A collector layer 25 comprising n.sup.- type GaAs is provided on the sub-collector layer 26. A base layer 24 comprising p.sup.+ type GaAs is provided on the collector layer 25. An emitter layer 23 comprising AlGaAs is provided on the base layer 24. A cap layer 22 comprising n type GaAs is provided on the emitter layer 23. A contact layer 21 for ohmic contact with an emitter electrode, comprising n.sup.+ type GaAs is provided on the cap layer 22. Be.sup.+ implantation regions 30 are provided at surface regions of the base layer 24 and the n type emitter layer 23 for contacting base electrode 28 with the base layer 24. An emitter electrode 27 is provided on the central portion of the contact layer 21. Base electrodes 28 are provided on the Be.sup.+ implantation regions 30. SiO.sub.2 films 29 are provided on the Be.sup.+ implantation regions 30 so as to insulate the base electrodes 28 and the emitter electrode 27.
The production process will be described.
First of all, collector layer 25, base layer 24, emitter layer 23, cap layer 22, and contact layer 21 are successively epitaxially grown on a sub-collector layer 26, and thereafter, an etching of the contact layer 21 and part of the cap layer 22 is conducted so as to enable contact of the base electrodes with the base region 24 which should be conducted later. Thereafter, ion implantation of Be.sup.+ is conducted using a dummy emitter as a mask thereby to produce Be.sup.+ implantation regions 30 which reach inside of the base layer 24 from the cap layer 22. Then, the cap layer 22 and the emitter layer 23 in the Be.sup.+ implantation regions 30 are inverted into p type. Next, a SiO.sub.2 film is produced on the Be.sup.+ implantation regions 30, required portions of the SiO.sub.2 film are removed, and emitter electrode 27 and base electrodes 28 are produced with the remaining SiO.sub.2 films 29 as a mask.
In the prior art HBT produced in this way, the BE.sup.+ implantation regions 30 are produced self-aligningly and thus the base resistance is low, thereby resulting in a superior characteristics.
In the prior art HBT of such a construction, portions of the contact layer 21 and part of the cap layer 22 have to be removed by etching in producing the Be.sup.+ implantation regions 30. When wet etching is adopted, reduction in the emitter size cannot be realized due to side etchings and variations in etchings, that produces variations in the emitter size. In addition, homojunction capacitance arises between emitter and base, thereby reducing operating speed. Furthermore, it is impossible to produce a completely planar structure, resulting in a disadvantage in producing integrated circuits.